Author : Prof. Jennifer Hasler
School of Electrical and Computer Engineering
Georgia Institute of Technology
School of Electrical and Computer Engineering
Georgia Institute of Technology
"A Programmable and Configurable Mixed-Mode FPAA SoC"
ABSTRACT
We will discuss large-scale Field Programmable Analog Arrays (FPAA) developed at GT as well as recent advances in programmable and configurable large-scale analog circuits and systems enabling a typical factor of 1000 improvement in computational power (Energy) efficiency over their digital counterparts. Scaling of energy efficiency, performance, and size will be discussed. We will overview a few examples in this area as helps the resulting roadmap discussion, including speech, vision, and sensor interfaces. These techniques are even more critical given the saturation of computational energy efficiency of digital multiply accumulate structures, the key component for high-performance computing. We will presents our Floating-Gate (FG) based, System-On-Chip (SoC) FPAA IC that integrates
divergent concepts from previous multiple large-scale Field-Programmable Analog Array (FPAA)
BIOGRAPHY
Jennifer Hasler is a Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology. Dr. Hasler received her M.S. and B.S.E. in Electrical Engineering from Arizona State University in 1991, and received her Ph.D. from California Institute of Technology in Computation and Neural Systems in 1997.
We will discuss large-scale Field Programmable Analog Arrays (FPAA) developed at GT as well as recent advances in programmable and configurable large-scale analog circuits and systems enabling a typical factor of 1000 improvement in computational power (Energy) efficiency over their digital counterparts. Scaling of energy efficiency, performance, and size will be discussed. We will overview a few examples in this area as helps the resulting roadmap discussion, including speech, vision, and sensor interfaces. These techniques are even more critical given the saturation of computational energy efficiency of digital multiply accumulate structures, the key component for high-performance computing. We will presents our Floating-Gate (FG) based, System-On-Chip (SoC) FPAA IC that integrates
divergent concepts from previous multiple large-scale Field-Programmable Analog Array (FPAA)
BIOGRAPHY
Jennifer Hasler is a Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology. Dr. Hasler received her M.S. and B.S.E. in Electrical Engineering from Arizona State University in 1991, and received her Ph.D. from California Institute of Technology in Computation and Neural Systems in 1997.
